Head-to-head AI inference benchmark comparison of GB200 NVL72 (NVIDIA Blackwell) and GB300 NVL72 (NVIDIA Blackwell) on DeepSeekv4 Pro 0813 1.6T. Latency, throughput, and cost across LLM workloads. Use the chart controls below to switch sequences, precisions, and metrics — same interactions as the main inference chart.
AgentX replays real coding-agent sessions rather than fixed-length prompts, so context grows turn over turn and most of each request is served from cache instead of being recomputed. That turns the comparison into a systems question: KV transfer between nodes, prefix-aware routing, and cache capacity all move the curve alongside raw chip throughput. Fixed-sequence workloads stay the clean baseline for kernel and silicon performance, so the two scenarios answer different questions about the same hardware. Learn more about AgentX →
Near the low end of the 25–284 tok/s/user interactivity band, at 90 tok/s/user on DeepSeekv4 Pro 0813 1.6T: GB200 NVL72 runs 43276 tok/s/chip at $0.01/M tokens, GB300 NVL72 runs 88840 at $0.01/M. GB300 NVL72 is 65% cheaper per token; GB300 NVL72 delivers 105% more tok/s/chip.
Setting 155 tok/s/user as the target on DeepSeekv4 Pro 0813 1.6T, GB200 NVL72 produces 16599 tok/s/chip ($0.03 per million tokens) and GB300 NVL72 produces 20218 ($0.03). GB200 NVL72 is 2% cheaper per token; GB300 NVL72 delivers 22% more tok/s/chip.
At 220 tok/s/user interactivity on DeepSeekv4 Pro 0813 1.6T, GB200 NVL72 delivers 5326 tok/s/chip at $0.10 per million tokens; GB300 NVL72 delivers 5755 tok/s/chip at $0.11. GB200 NVL72 is 15% cheaper per token; GB300 NVL72 delivers 8% more tok/s/chip at this point. (Numbers reflect the default agentic-traces · fp4 selection for this URL — table and chart below update if you change sequence, precision, or model in the controls.)
| Metric | Interactivity (tok/s/user) | Interactivity (tok/s/user) | Interactivity (tok/s/user) |
|---|---|---|---|
| Throughput (tok/s/chip) | GB200 NVL72:43275.7GB300 NVL72:88839.8 | GB200 NVL72:16599.4GB300 NVL72:20218.1 | GB200 NVL72:5326.3GB300 NVL72:5754.6 |
| Cost ($/M tok) | GB200 NVL72:$0.012GB300 NVL72:$0.007 | GB200 NVL72:$0.031GB300 NVL72:$0.032 | GB200 NVL72:$0.097GB300 NVL72:$0.112 |
| tok/s/MW | GB200 NVL72:23142064GB300 NVL72:41905567 | GB200 NVL72:8876687GB300 NVL72:9536841 | GB200 NVL72:2848293GB300 NVL72:2714439 |
| Concurrency | GB200 NVL72:~567GB300 NVL72:~515 | GB200 NVL72:~59GB300 NVL72:~83 | GB200 NVL72:~8GB300 NVL72:~11 |
Agentic inference metrics from the AgentX scenario and fixed-sequence inference metrics across models, hardware configurations, and serving parameters.
TCO $/chip/hr:
Source: SemiAnalysis Market July 2026 Pricing Surveys & AI Cloud TCO Model
Note: Disaggregated inference configurations (e.g., MoRI SGLang, Dynamo TRTLLM) calculate cost per million tokens per decode chip or per prefill chip, rather than per total chip count. This makes direct token cost comparison with aggregated configs not an apples-to-apples comparison.
Note: Disaggregated inference configurations (e.g., MoRI SGLang, Dynamo TRTLLM) calculate input throughput per decode chip or per prefill chip, rather than per total chip count. This makes direct input throughput comparison with aggregated configs not an apples-to-apples comparison.
Note: Disaggregated inference configurations (e.g., MoRI SGLang, Dynamo TRTLLM) calculate output throughput per decode chip or per prefill chip, rather than per total chip count. This makes direct output throughput comparison with aggregated configs not an apples-to-apples comparison.
Note: Disaggregated inference configurations (e.g., MoRI SGLang, Dynamo TRTLLM) calculate power per decode chip or per prefill chip, rather than per total chip count. This makes direct power comparison with aggregated configs not an apples-to-apples comparison.
Note: Disaggregated inference configurations (e.g., MoRI SGLang, Dynamo TRTLLM) calculate Joules per decode chip or per prefill chip, rather than per total chip count. This makes direct Joules per token comparison with aggregated configs not an apples-to-apples comparison.
Matching measurements exist, but their chip series are hidden.
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